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PLL Technology Crystal Oscillator EPSON Q3309CA400090 with Programmable Output and CMOS Technology

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PLL Technology Crystal Oscillator EPSON Q3309CA400090 with Programmable Output and CMOS Technology

Frequency : 11.0592MHz

Description : Programmable Oscillator 11.0592MHz SMD7050-4P

Mfr. Part # : Q3309CA400090

Model Number : Q3309CA400090

Package : SMD7050-4P

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Crystal Oscillator SG-8002 Series

The SG-8002 series crystal oscillators offer programmable output with CMOS technology, available in a frequency range of 1 MHz to 125 MHz. Designed for versatility, these oscillators support supply voltages of 3.0 V, 3.3 V, and 5.0 V. They feature output enable (OE) or standby (ST) functions, enabling flexible control. The series benefits from PLL technology for short mass production lead times. An SG-Writer is available for programming. These oscillators are suitable for general use in electronic equipment and are designed for automotive applications.

Product Attributes

  • Brand: Seiko Epson
  • Technology: PLL
  • Certifications: ISO 14001, ISO 9001, ISO/TS 16949 (for automotive applications)
  • Environmental Compliance: Pb-free, EU RoHS directive compliant

Technical Specifications

Item Symbol Specifications Conditions / Remarks
Output frequency range f0 1 MHz to 125 MHz VCC = 4.5 V to 5.5 V
VCC = 3.0 V to 3.6 V
VCC = 2.7 V to 3.6 V
Supply voltage VCC 4.5 V to 5.5 V
2.7 V to 3.6 V
Storage temperature T_stg -55 C to +125 C
-55 C to +100 C
-40 C to +125 C
(SG-8002CA / JA / DC ) Storage as single product.
(SG-8002JC)
(SG-8002CE)
Operating temperature T_use -20 C to +70 C / -40 C to +85 C *1
Frequency tolerance f_tol B: 50 10-6, C: 100 10-6
M: 100 10-6
-20 C to +70 C
-40 C to +85 C (except SG-8002JC) *3
Current consumption ICC 40 mA Max. (SG-8002CE)
28 mA Max.
45 mA Max. (SG-8002CA / JC / JA / DC )
No load condition, Max. frequency
Output disable current I_dis 30 mA Max.
16 mA Max.
OE=GND (PT.PH,PC)
Stand-by current I_std 50 A Max. ST =GND (ST,SH,SC)
Symmetry SYM 40 % to 60 %
45 % to 55 %
TTL load: 1.4 V, Max. load condition
CMOS load:50 % VCC level, Max. load condition
Output voltage (High) VOH VCC -0.4 V Min. IOH=-16 mA (PT,ST,PH,SH) , -8 mA (PC,SC)
Output voltage (Low) VOL 0.4 V Max. IOL=16 mA (PT,ST,PH,SH) , 8 mA (PC,SC)
Output load condition (TTL) L_TTL 5 TTL Max. Max. frequency and Max. Supply voltage (SG-8002CE / CA / JA / DC )
f0 90 MHz and Max. Supply voltage (SG-8002JC )
Output load condition (CMOS) L_CMOS 15 pF Max.
25 pF Max.
Max. frequency and Max. Supply voltage (SG-8002CE / JC)
Max. frequency and Max. Supply voltage (SG-8002CA / JA / DC )
Input voltage (High) VIH 2.0 V Min.
70 % VCC Min.
OE terminal or ST terminal
Input voltage (Low) VIL 0.8 V Max.
20 % VCC Max.
OE terminal or ST terminal
Rise / Fall time tr/ tf 4 ns Max.
3 ns Max.
TTL load: 0.4 V to 2.4 V level
CMOS load: 20 % VCC to 80 % VCC level
Start-up time t_str 10 ms Max. Time at minimum supply voltage to be 0 s
Frequency aging f_aging 5 10-6 / year Max. +25 C, VCC=5.0 V/ 3.3 V (PC,SC) First year *1

Models and Packages

Model Package Type Dimensions (mm) Pin Count Pin Map (OE/ST, GND, OUT, VCC)
SG-8002CE Ceramic SON 4pin 3.2 x 2.5 x 1.05 4 1: OE or ST, 2: GND, 3: OUT, 4: VCC
SG-8002CA Ceramic SON 4pin 7.0 x 5.0 x 1.4 4 1: OE or ST, 2: GND, 3: OUT, 4: VCC
SG-8002JC SOJ 4pin 10.5 x 5.8 x 2.7 4 1: OE or ST, 2: GND, 3: OUT, 4: VCC
SG-8002JA SOJ 4pin 14.0 x 9.8 x 4.7 4 1: OE or ST, 2: GND, 3: OUT, 4: VCC
SG-8002DC DIP half size 13.7 x 6.6 x 2.54 (pitch) 8 (for DIP) 1: OE or ST, 4: GND, 5: OUT, 8: VCC

Jitter Specifications

Model Supply Voltage Jitter Item Specifications Remarks
PT / PH 5.0 V 0.5 V Cycle to cycle 150 ps Max.
200 ps Max.
33 MHz f0 125 MHz, L_CMOS=15 pF
1.0 MHz f0 < 33 MHz, L_CMOS=15 pF
PT / PH 5.0 V 0.5 V Peak to peak 200 ps Max.
250 ps Max.
33 MHz f0 125 MHz, L_CMOS=15 pF
1.0 MHz f0 < 33 MHz, L_CMOS=15 pF
SC / PC 3.3 V 0.3 V Cycle to cycle 200 ps Max. 1.0 MHz f0 125 MHz, L_CMOS=15 pF
SC / PC 3.3 V 0.3 V Peak to peak 250 ps Max. 1.0 MHz f0 125 MHz, L_CMOS=15 pF

Note: Please refer to the provided documentation for detailed specifications regarding operating temperature, available frequencies, symmetry, output load conditions, and rise/fall time. Jitter specifications are not recommended for analog video clock use or telecommunication synchronization due to potential increases when cascaded with other PLL oscillators.


2411041628_EPSON-Q3309CA400090_C3003599.pdf


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