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Output Level : ECL
Voltage - Supply : 3V~3.6V;-3.6V~-3V
Operating Temperature : -40℃~+85℃
Available Total Delays : 2.2ns~12.2ns
Description : ECL 2.2ns~12.2ns LQFP-32(7x7) Delay Lines RoHS
Mfr. Part # : MC100EP195FAG
Model Number : MC100EP195FAG
Package : LQFP-32(7x7)
The MC10/100EP195 is a Programmable Delay Chip (PDC) designed for clock deskewing and timing adjustment. It offers variable delay for differential NECL/PECL input transitions with a digitally selectable resolution of approximately 10 ps and a net range of up to 10.2 ns. The delay is controlled by 10 data select inputs (D[9:0]) and the LEN pin for load and hold functions. The device features a fixed minimum delay of 2.2 ns and supports cascading for extended programmable range. It can accept ECL, LVCMOS, or LVTTL input levels and includes an internal VBB reference voltage output.
| Specification | Value | Notes |
|---|---|---|
| Model Numbers | MC10EP195, MC100EP195 | |
| Programmable Delay Resolution | ~10 ps | |
| Maximum Programmable Range | 10.2 ns | |
| Fixed Minimum Delay | 2.2 ns | |
| Maximum Input Clock Frequency | >1.2 GHz (Typical) | |
| PECL Mode Operating Range | VCC = 3.0 V to 3.6 V, VEE = 0 V | |
| NECL Mode Operating Range | VCC = 0 V, VEE = -3.0 V to -3.6 V | |
| Data Select Inputs | D[9:0] | Accept ECL, LVCMOS, or LVTTL |
| Cascade Control Input | D[10] | |
| Load/Hold Input | LEN | |
| Enable Input | EN | Logic High forces Q to Logic Low |
| Minimum Delay Set | SETMIN | |
| Maximum Delay Set | SETMAX | |
| Reference Voltage Output | VBB | Internally generated |
| Input Pulldown Resistor (R1) | 75 k | Internal |
| ESD Protection (HBM) | >2 kV | |
| ESD Protection (MM) | >100 V | |
| ESD Protection (CDM) | >2 kV | |
| Operating Temperature Range | -40C to +85C | |
| Propagation Delay (IN to Q, D[0:10]=0) | 1650 ps (Typ) | @ -40C |
| Propagation Delay (IN to Q, D[0:10]=0) | 1600 ps (Typ) | @ 25C |
| Propagation Delay (IN to Q, D[0:10]=0) | 1800 ps (Typ) | @ 85C |
| Propagation Delay (IN to Q, D[0:10]=1023) | 9500 ps (Typ) | @ -40C |
| Propagation Delay (IN to Q, D[0:10]=1023) | 10000 ps (Typ) | @ 25C |
| Propagation Delay (IN to Q, D[0:10]=1023) | 10800 ps (Typ) | @ 85C |
| Programmable Range (tPD(max) - tPD(min)) | 7850 ps (Typ) | @ -40C |
| Programmable Range (tPD(max) - tPD(min)) | 8200 ps (Typ) | @ 25C |
| Programmable Range (tPD(max) - tPD(min)) | 8850 ps (Typ) | @ 85C |
| Step Delay (D0 High) | 13 ps (Typ) | @ -40C |
| Step Delay (D0 High) | 14 ps (Typ) | @ 25C |
| Step Delay (D0 High) | 14 ps (Typ) | @ 85C |
| Output Rise/Fall Time (Q, 20-80% @ 50 MHz) | 85 ps (Typ) | @ -40C |
| Output Rise/Fall Time (Q, 20-80% @ 50 MHz) | 85 ps (Typ) | @ 25C |
| Output Rise/Fall Time (Q, 20-80% @ 50 MHz) | 95 ps (Typ) | @ 85C |
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Variable Delay Chip onsemi MC100EP195FAG with 10.2 Nanosecond Range and 2.2 Nanosecond Minimum Delay Images |